The present invention pertains to an improvement in an integrated circuit resistance ladder.
Resistance ladders typically are used in digital-to-analog (D/A) converters and in analog-to-digital (A/D) converters. Many resistance ladders include a long series of resistances for example, a series of 256 resistances is quite common.
When the D/A and A/D converters are embodied in integrated circuits, it is necessary to construct the resistance ladders within very small areas. The dimensional restrictions on the available area and die size limitations typically necessitate the resistance ladder being broken up into a plurality of linear segments which are connected in series. Each linear segment is defined in an integrated circuit chip by a layer of resistive material diffused in a semiconductor substrate. A plurality of connector tabs extend from each of the linear segments at predetermined intervals for defining the resistance branches within each linear segment. The linear segments of the resistive material are connected together by metallic contacts, which are deposited on the semiconductor substrate. Because the metallic contacts are deposited in a processing step that is performed separately from the processing step of diffusing the linear segments of resistive material, errors in alignment sometimes occur. Also there are variations in the contact resistance between the metallic contacts and the resistive layer, thereby introducing errors into the resistance ladder.